Modelling the Fetch-Decode-Execu

Modelling the Fetch-Decode-Execute Cycle - CPU Notes

Use the buttons in the diagram to 'RUN' the program code... use these to make notes on this topic!!

	The Program code	Status Registers
1001002 Copy title 01 from page 002 Architecture of CPU! 3001002 Copy paragraph 01 from page 002 Hardware and Software! 4001002 Copy diagram 01 from page 002 MIPOS diagram - Computer model! 9333333 Create a real-world example MIPOS diagram - Computer model! 9777777 Get teacher to check your work so far MIPOS diagram - Computer model! 2001003 Copy subtitle 01 from page 003 Von Neumann Architecture! 7002003 Summarise paragraph 02 from page 003 Von Neumann Architecture! 4001003 Copy diagram 01 from page 003 MIPOS with cache diagram! 2002005 Copy subtitle 02 from page 005 Cache memory! 6003005 Summarise section 03 from page 005 Cache memory! 9222222 Summarise own/class knowledge Cache memory! 5003006 Copy Question #03 on page 006 Expensive memory! 8003006 Answer Question #03 on page 006 Expensive memory! 9777777 Get teacher to check your work so far Expensive memory! 2003003 Copy subheading 03 from page 003 Fetch-Decode-Execute cycle! 4002003 Copy diagram 02 from page 003 Fetch-Decode-Execute diagram! 9222222 Summarise own/class knowledge Fetch-Decode-Execute! 9999999 Halt	Processor Mode Program Counter Current Instruction Register Memory Data Register
	Debug monitor
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The Program code

Status Registers

1001002                    Copy title 01 from page 002                Architecture of CPU!
3001002                    Copy paragraph 01 from page 002            Hardware and Software!
4001002                    Copy diagram 01 from page 002              MIPOS diagram - Computer model!
9333333                    Create a real-world example                MIPOS diagram - Computer model!
9777777                    Get teacher to check your work so far      MIPOS diagram - Computer model!
2001003                    Copy subtitle 01 from page 003             Von Neumann Architecture!
7002003                    Summarise paragraph 02 from page 003       Von Neumann Architecture!
4001003                    Copy diagram 01 from page 003              MIPOS with cache diagram!
2002005                    Copy subtitle 02 from page 005             Cache memory!
6003005                    Summarise section 03 from page 005         Cache memory!
9222222                    Summarise own/class knowledge              Cache memory!
5003006                    Copy Question #03 on page 006              Expensive memory!
8003006                    Answer Question #03 on page 006            Expensive memory!
9777777                    Get teacher to check your work so far      Expensive memory!
2003003                    Copy subheading 03 from page 003           Fetch-Decode-Execute cycle!
4002003                    Copy diagram 02 from page 003              Fetch-Decode-Execute diagram!
9222222                    Summarise own/class knowledge              Fetch-Decode-Execute!
9999999                    Halt

Processor Mode

Program Counter

Current Instruction Register

Memory Data Register

Debug monitor

Code	Mnemonic	Instructions
10xxppp	CpyTtl	Copy Title Number xx on page ppp
20xxppp	CpySub	Copy SubTitle xx on page ppp
30xxppp	CpyPar	Copy paragraph xx on page ppp
40xxppp	CpyDgr	Copy diagram xx on page ppp
50xxppp	CpyQst	Copy question xx on page ppp
60xxppp	SumSub	Summarise section xx on page ppp
70xxppp	SumPar	Summarise paragraph xx on page ppp
80xxppp	AnsQst	Answer question xx on page ppp
9111111	WebQry	Make notes from web query – use last title/subtitle/diagram as search term
9222222	SumLst	Summarise what you know based on Memory Data Register
9333333	EgLast	Give a real world example of the subject held in the Memory Data Register
9777777	TchChk	Pause – request teacher interrupt to restart system clock
9999999	Halt	Stop processing and signal finished output